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EMBEDDED & INTELLIGENT SYSTEMS ENGINEER

Vishva Patel

Engineering Secure Systems at the Intersection of Hardware and Intelligence

SECURITY × INTELLIGENCE × SYSTEM DESIGN

I love to design systems where hardware logic and AI verification work together to ensure real-world trust.

Driven by fast iteration, deep system understanding, and a constant focus on correctness under constraints.

I approach problems by breaking them into verifiable stages, analyzing trade-offs, and refining until the system behaves predictably.

DARVS System Overview
Camera Feed
RES: 1920x1440
FPS: 30
RECORDING
System Status
▶ Awaiting verification...

STATUS

● IDLE

ANALYZER

LOW RISK

TIMING

244 ms

CONFIDENCE

0%

SCAN to Authenticate Your Identity

Press the SCAN button above to proceed.

Engineering Work

Selected Systems & Architectures

Built and validated secure execution pipelines spanning intelligent authentication and deterministic hardware access control.

DARVS (Deepfake Authentication & Reality Verification System)

Multi-layer biometric authentication pipeline verifying identity and real-world presence under adversarial conditions.

Camera→MTCNN→Anti-Spoof→Liveness→FaceNet→Decision

~3-4 FPS

FaceNet

MTCNN

Movement + Blink

Liveness Verification

Movement + blink based real-world presence validation.

Anti-Spoof Detection

Prevents replay, screen, and deepfake-based attacks.

USMHACS (Ultra Secure Multi-layer Hardware Access Control System)

Hardware-Level Secure Access Control System

  • Multi-layer verification using sensors, key, code, delay, and tamper detection.
  • Deterministic hardware logic with zero software dependency.
  • Fail-safe lockout system with real-time signal simulation.
Hardware OnlyNO Microcontroller/ProcessorReal-Time Simulation

USMHACS Full Simulator

Best viewed as a full-page engineering tool environment.

Launch Simulator

System Validation

Hardware demonstration and verification context

  • Demonstrated hardware systems at Eureka technical exhibition.
  • Built and tested real hardware implementations, not simulation-only prototypes.
  • Verified system behavior under real-world conditions and fault scenarios.
  • Designed complete engineering pipelines from hardware sensing to logic gating and output actuation.

Additional Implemented Systems

Compact implementations demonstrating embedded architecture and digital logic depth.

Autonomous Robo Car

Embedded System

Multi-modal robotic platform integrating real-time control switching across assisted and autonomous modes.

ESP32Voice ControlBluetoothGestureLine FollowObstacle AvoidanceHuman Follow

Hardware Stopwatch (IC-Based)

Digital Logic

Hardware-only stopwatch architecture using discrete timing and counting ICs for deterministic mm:ss progression.

Timer IC74LS904511 Decoder7-Segment00:00-59:59No Microcontroller